FET modeling using Knowledge-Based Neural Networks (KBNNs)

In the ongoing research phase, we aim to optimize the FET modeling approach using Knowledge-Based Neural Networks (KBNNs). Our objectives include refining the KBNN architecture, extending its application to diverse semiconductor technologies, and integrating it with popular CAD tools. Through these efforts, we aim to establish KBNNs as a versatile and efficient tool for semiconductor device modeling across various technological domains.
In this project, your responsibilities will be:
Understanding compact device modeling and basic device physics.
Creating Neural Network models for device modeling
Using novel techniques to improve model accuracy
Converting this compact model to a SPICE model or Verilog-A model